1. Field of the Invention
The present invention relates, in general, to solid-state image devices which have solid-state image sensors for producing a still image in a frame. More specifically, the invention relates to solid-state image devices which produce an iamge by interlacing two fields.
2. Description of the prior art
Generally, solid-state image devices having solid-state image sensors are widely used for their compact size and easy handling. In the image sensor, a plurality of pixels (picture element) are arranged in two-dimensions.
Accordingly, various methods are used for reading the signal charge from each pixel. Two typical processes for reading the signal charge are the Frame Transfer type and Interline Transfer type. In addition to these types, the Frame Interline Transfer type (hereinafter referred to as FIT) has been developed for use with high integration density pixels and electrical shutter functions.
In general, the FIT type image sensor includes an image section for photoelectric conversion, a storage section for storing a signal charge temporarily, a horizontal transfer section for transferring the signal charge from the storage section to the output amplifier section and an output amplifier section. In the image section, a plurality of photodiodes are arranged in two-dimensions. Vertical transfer CCDs (Charge Coupled Device) are disposed between lines of photodiodes. Consequently, the photodiodes behave as linear image sensors. The linear image sensors, present in the the same number as there are horizontal pixels, are arranged in parallel. The top surface of the vertical transfer CCD is shielded optically. Image light is incident (falls) only on the photodiodes and is photoelectrically converted. With the photoelectric conversion for a prescribed time, electro charges which are stored in the photodiodes are transferred in parallel to the corresponding vertical transfer CCD at one time. This operation is performed due to the closeness of the pixels and vertical transfer CCDs. The storage section is capable of storing all of the signal charges that constitute one field image. Further, the storage section is well shielded.
After the transfer of the signal charges from each pixel to the vertical transfer CCD has been performed, the vertical transfer CCDs transfer the signal charges to the storage section by using a frame transfer technique. The vertical transfer CCD, which performed the frame transfer, is also used as a part of a drain for undesired charge.
Accordingly, FIT is capable of controlling the amount of time that each pixel stores a signal charge. Line shift occurs within each horizontal blanking period, and signal charges, which consist of one horizontal line of the picture image, are transferred from the storage section to the horizontal transfer section successively. Signal charges in the horizontal transfer section are transferred to the output section.
As an example, this type of solid-state image device is described in Japanese Patent Disclosure (Kokai) No. 63-90973. The conventional technique discloses that undesirable charge is swept out through the vertical transfer CCDs in a conventional manner. Specifically, the undesirable charge is swept out through the vertical transfer CCDs and the storage section in each frame period but not in each field period.
In the solid-state image device described above, however, the vertical transfer CCDs are disposed adjacent to the linear image sensors. Thus, a slight amount of light gets into the vertical transfer CCDs. Thus, a charge corresponding to the quantity of light incident is generated in the vertical transfer CCDs due to the smear phenomena. As a result, a difference in picture signal levels is caused by comparison of one field signal to the next.